Graphics systems generate graphics data for a graphical surface and store the resultant data in a graphics memory, such as a dynamic random access memory (DRAM) system. In many graphics systems, data is generated and stored for localized regions of the graphical surface as tiles. An address translation is performed to convert from the (x, y) or (x, y, z) coordinates of a particular region of the graphical surface to a memory address. The address translation is performed as a chain of translations. First, an (x, y) or (x, y, z) surface coordinate is translated to a virtual memory address. Second, the virtual address is translated to a physical memory address. Third, the physical memory address is translated to the raw DRAM address which comprises columns, banks, rows, and partition numbers.
Conventionally a pitch formula is used to map surface coordinates to a virtual address. The pitch formula translates multidimensional spatial coordinates to a one dimensional memory address. A typical pitch formula is VA=y*pitch+x*size_of_pixel, where VA is the virtual address, x and y are surface coordinates of the graphics surface, size_of_pixel is the size of the pixel, and the pitch is a constant.
Referring to FIG. 1, conventionally a tile remapping table is used to map the virtual address determined by the pitch formula to tiled memory regions. For example, virtual addresses within specified byte ranges are mapped to bytes within a particular tile 110-1 of a group of tiles 110-1, 110-2, 110-3, 110-4, 110-5, and 110-6. An individual tile, such as tile 110-1, may have bytes mapped sequentially through rows of the tile, such as along rows for bytes 0 to 4K−1.
Referring to FIG. 2, in the prior art, a 1:1 mapping is performed between the virtual addresses defined by the pitch formula to raw addresses used to access DRAM memory. Regions are defined with respect to minimum and maximum address pairs (“min/max pairs”) within the virtual address space. Based on the min/max pairs, a lookup is performed to a region table stored in hardware registers. The region table assigned to the min/max pair provides information for translating from the virtual addresses to raw DRAM addresses. For example, the region table may include information on whether the data was compressed.
One drawback of the prior art is that it provides only a limited capability to define lookup attributes. In particular, each region table requires hardware registers. The number of hardware registers that may be utilized for address translation is limited by various considerations, including hardware costs. Consequently, the number of different region tables that can be supported is a fixed, limited number. However, modern graphics systems increasingly employ a wide range of data compression and formatting modes. As a result, prior art address translation techniques limit the ability of a graphics system to utilize a large number of surfaces with different compression and data formats.
In light of the above-described problems the need arose for the apparatus, system, and method of the present invention.